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Power Bypassing Requirements

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I am designing a minimal RZ/A1L system and am setting up all the power bypassing.  I see the application note with a simple DC/DC converter and it has significantly less bulk capacitance than the reference design has for the RZ/A1H.  Is there a datasheet or document which identifies specific power bypassing requirements?  I'm guessing that I don't need as much as the reference design but I don't want to starve my system for power either.  Any help you can provide would be greatly appreciated.

Thanks,


RZ/A1H ADC Sample Rate

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Hi all.

I'm going to use R7S721000VCFP and I'm interested in ADC maximum sample rate.

After reading RZ/A1H user manual I'm little bit confused.

Page 1504 (par 27.1) says: Minimum conversion time: 5.0 ms per channel.

However, page 3102 (Table 59.31) says: Conversion time 5 us.

Does anybody know what is a correct value?

Running freeRTOS on GENMAI board

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Hi All,

I am working on development of audio/video streaming in GENMAI board.
I have downloaded RZ/A1H Group CMSIS-RTOS RTX BSP (for GENMAI) from renasas site
and developed my application on CMSIS-RTOS RTX.

Now I have to port my code to FreeRTOS. How can i acheive this?
Whether Renesas has providing any CMSIS-RTOS Wrapper for freeRTOS ?

Please provide necessary guideline to proceed my task.

Thanks and Regards,

Chintha

salvator x board

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can anybody tell me how to boot the salvator x board?

RZA1 RSK GPIO Issue with SysFs

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On the RZA1 RSK dev kit, we removed the ethernet chip and we were able to use the ETH_IRQ as IRQ6 by pinmuxing pin P4_14 in the kernel board file, board-rskrza1.c:

r7s72100_pfc_pin_assign(P4_14, ALT8, DIIO_PBDC_DIS);

Additionally, without pinmuxing in the kernel, we were able to drive P7_1 ( GPIO 98 ) high and low using the Linux sysfs entry for gpio:

$ cd /sys/class/gpio/
$ echo 98 > export
$ echo out > P7_1/direction
$ echo 1 > P7_1/value
$ echo 0 > P7_1/value
$ echo 1 > P7_1/value

Now we want to use another Pin ( P2_0 ) as a GPIO. Page 1-20 in the hardware manual shows the General Purpose I/Os available on the RZA1H, and P2_0 is one of them.

$ echo 22 > export
$ ls
P2_0       P7_1       export     gpiochip0  unexport
$ echo out > P2_0/direction
$ echo 0 > P2_0/value
$ echo 1 > P2_0/value
$ echo 0 > P2_0/value

The problem is that the scope never shows a level change on this pin ( or several others in the GPIO range ).

We've also tried the various pfc_direction values from the enumeration below in the boardfile to pinmux these GPIO. How can we use P2_0 as a GPIO? What is different between P7_1 and P_20? Thank you.

In the Renesas Kernel, the file pfc-rza1.c contains the function used for pinmuxing:
/*
* @pinnum: a pin number.
* @mode:   port mode or alternative N mode.
* @dir:    Kind of I/O mode and data direction and PBDC and Output Level.
*          PIPC enable SoC IP to control a direction.
*/
int r7s72100_pfc_pin_assign(enum pfc_pin_number pinnum, enum pfc_mode mode,
                                             enum pfc_direction dir)
In the Renesas Kernel, the file r7s72100.h contains the following enumerations that are used when pinmuxing:
enum pfc_mode {
               PMODE = 0,
               ALT1, ALT2, ALT3, ALT4, ALT5, ALT6, ALT7, ALT8,
               PINMUX_STATE_NUM,
};
 
enum pfc_direction {
               DIIO_PBDC_DIS = 0,         /* Direct I/O Mode & PBDC Disable */
               DIIO_PBDC_EN,                /* Direct I/O Mode & PBDC Enable */
               SWIO_OUT_PBDCDIS,     /* Software I/O Mode & Output direction PBDC Disable */
               SWIO_OUT_PBDCEN,      /* Software I/O Mode & Output direction PBDC Enable */
               PORT_OUT_HIGH,                           /* Port Mode & Output direction & High Level Output Pn = 1 */
               PORT_OUT_LOW,                           /* Port Mode & Output direction & Low Level Output Pn = 0 */
               DIR_OUT,
               DIR_IN,                               /* Port Mode or Software I/O Mode is Direction IN */
               DIR_LVDS,
};

SPI chip select signal stay low too long

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Hi,

I am using the RSPI driver on a rza1m CPU on a custom board. I want to get multiple register value from ADE. The speed is very important since I need to refresh all value every 100ms. I have difficulties to reach that limit because I have fond out that the chip select signal is staying low a long time after the last CLOCK toggle. I am using IOCTL in C language and the value of delay_usecs in the spi_ioc_transfer struct.

Yellow->CLOCK

GREEN->MOSI

BLUE->MISO

RED->CS

Do anyone know how I could reduce the delay for the chip select?

Hibernation/suspend to disk support in RZ/G1E starter kit.

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Hi everyone,

1. I followed steps given in http://elinux.org/RZ-G/Boards/SK-RZG1E for running yocto on RZ/G1E for kernel 3.10

2. On top of this , I applied patch https://lists.linaro.org/pipermail/linaro-kernel/2014-March/012112.html on top of the kernel.

With this changes I am able to create hibernation image on external sdcard swap partition.Please check below for full logs.

But while resume, its giving error for swsusp signature of image.

Can anyone help If I am missing something.

If you have any idea or solution, please help me.

Thank you.

Full log:

root@skrzg1e:~# mkswap /dev/mmcblk0p1
root@skrzg1e:~# swapon /dev/mmcblk0p1
root@skrzg1e:~# echo shutdown > /sys/power/disk
root@skrzg1e:~# echo disk >/sys/power/state
PM: Syncing filesystems ... done.
Freezing user space processes ... (elapsed 0.01 seconds) done.
PM: Preallocating image memory... done (allocated 17005 pages)
PM: Allocated 68020 kbytes in 0.21 seconds (323.90 MB/s)
Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done.
Suspending console(s) (use no_console_suspend to debug)
PM: freeze of devices complete after 5.859 msecs
PM: late freeze of devices complete after 0.565 msecs
PM: noirq freeze of devices complete after 1.035 msecs
Disabling non-boot CPUs ...
CPU1: shutdown
PM: Creating hibernation image:
PM: Need to copy 16740 pages
PM: Hibernation image created (16740 pages copied)
Enabling non-boot CPUs ...
CPU1: Booted secondary processor
CPU1 is up
PM: noirq thaw of devices complete after 0.530 msecs
PM: early thaw of devices complete after 0.371 msecs
PM: thaw of devices complete after 562.505 msecs
PM: Using 1 thread(s) for compression.
PM: Compressing and saving image data (16757 pages)...
PM: Image saving progress: 0%
PM: Image saving progress: 10%
PM: Image saving progress: 20%
PM: Image saving progress: 30%
PM: Image saving progress: 40%
PM: Image saving progress: 50%
PM: Image saving progress: 60%
PM: Image saving progress: 70%
PM: Image saving progress: 80%
PM: Image saving progress: 90%
PM: Image saving progress: 100%
PM: Image saving done.
PM: Wrote 67028 kbytes in 4.11 seconds (16.30 MB/s)
PM: S|
Power down.
------------[ cut here ]------------
WARNING: at kernel/smp.c:244 smp_call_function_single+0xa8/0x1a0()
Modules linked in:
CPU: 0 PID: 1065 Comm: sh Not tainted 3.10.31-ltsi-00001-gbb8f200-dirty #26
Backtrace:
[<c0012470>] (dump_backtrace+0x0/0x104) from [<c001267c>] (show_stack+0x18/0x1c)
r6:c0069478 r5:00000009 r4:00000000 r3:44404100
[<c0012664>] (show_stack+0x0/0x1c) from [<c04796c4>] (dump_stack+0x20/0x28)
[<c04796a4>] (dump_stack+
0x0/0x28) from [<c00222c8>] (warn_slowpath_common+0x54/0x74)
[<c0022274>] (warn_slowpath_common+0x0/0x74) from [<c002238c>] (warn_slowpath_null+0x24/0x2c)
r8:00000001 r7:c11def58 r6:c007cc0c r5:00000000 r4:00000000
r3:00000009
[<c0022368>] (warn_slowpath_null+0x0/0x2c) from [<c0069478>] (smp_call_function_single+0xa8/0x1a0)
[<c00693d0>] (smp_call_function_single+0x0/0x1a0) from [<c007e608>] (perf_event_exit_cpu+0xb0/0xf0)
[<c007e558>] (perf_event_exit_cpu+0x0/0xf0) from [<c007e688>] (perf_reboot+0x40/0x54)
[<c007e648>] (perf_reboot+0x0/0x54) from [<c0044ce8>] (notifier_call_chain+0x48/0x70)
r6:00000002 r5:00000000 r4:ffffffff r3:c007e648
[<c0044ca0>] (notifier_call_chain+0x0/0x70) from [<c0045008>] (__blocking_notifier_call_chain+0x4c/0x64)
r8:00000002 r7:00000000 r6:ffffffff r5:c06750bc r4:c06739a8
r3:ffffffff
[<c0044fbc>] (__blocking_notifier_call_chain+0x0/0x64) from [<c0045040>] (blocking_notifier_call_chain+0x20
/0x28)
r8:c0673ef8 r7:d61ce038 r6:c06abda0 r5:00000000 r4:c0673ef8
[<c0045020>] (blocking_notifier_call_chain+0x0/0x28) from [<c0034714>] (kernel_halt+0x1c/0x5c)
[<c00346f8>] (kernel_halt+0x0/0x5c) from [<c0478550>] (power_down+0xa0/0xc4)
[<c04784b0>] (power_down+0x0/0xc4) from [<c00573c4>] (hibernate+0x140/0x1c4)
r4:c0673f8c r3:c06abec8
[<c0057284>] (hibernate+0x0/0x1c4) from [<c0055504>] (state_store+0x60/0xc8)
r9:d68f7988 r8:d68fce00 r7:00000005 r6:d6bad000 r5:00000004
r4:00000005
[<c00554a4>] (state_store+0x0/0xc8) from [<c01c3650>] (kobj_attr_store+0x1c/0x28)
r9:d68f7988 r8:d68fce00 r7:d61cff78 r6:d62b1d18 r5:d62b1d00
r4:00000005
[<c01c3634>] (kobj_attr_store+0x0/0x28) from [<c010c950>] (sysfs_write_file+0x10c/0x150)
[<c010c844>] (sysfs_write_file+0x0/0x150) from [<c00bbc70>] (vfs_write+0xdc/0x18c)
[<c00bbb94>] (vfs_write+0x0/0x18c) from [<c00bc170>] (SyS_write+0x44/0x74)
r9:00000005 r8:000e6408 r7:00000000 r6:d6250e40 r5:00000000
r4:00000000
[<c00bc12c>] (SyS_write+0x0/0x74) from [<c000e940>] (ret_fast_syscall+0x0/0x30)
r9:d61ce000 r8:c000eae8 r7:00000004 r6:b6f3ab58 r5:000e6408
r4:00000005
---[ end trace e6d43a8b46b6aaf1 ]---
System halted.

root@skrzg1e:~# echo disk >/sys/power/state

[RZ/A1H][VDC5] Reducing the size of graphic frame

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Hello everyone,

Currently, I'm developing image processing  on RSK board (RZ/A1H platform) using VDC5 module and using TFT LCD panel (800x480) to show the output image. The BSP package which is downloaded from Renesas website (CMSIS RTOS RTX v2.04).

There are two buffer frames: FrameBuffer_Video (video frame) and FrameBuffer_1 (graphic frame )

      + video frame: YCrCb422 format, after scaling down, the frame buffer size: 400x240x2 = 187.5 [KB] (graphic 0, layer 0) ==> video frame shows the current image which is captured from the camera (VIDEO1 Input)

      + graphic frame: aRGB8888 format, the frame buffer size: 800x480x4 = 1500 [KB] (graphic 2, layer 2) ==> graphic frame shows some information after processing image (for example: text, circle, rectangle, ..)

My question: Is there any way to reduce the size of graphic frame?

    Below is some solutions that I tried in before:

          1. Scale down the size of graphic frame. But as my understanding, It's just possible for graphic 0 and graphic 1 only, is this right? (in our case, graphic 2 is selected)

           2. Change the frame format (for example: RGB888, CLUT,...) ==> I tried with RGB888, however, the graphic 0 did not display due to overlapping of graphic 2.

If you have any ideal or solution, please help me.

Thank you!


Hardware design query for using LVDS port of RZ/A1 MPU

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I want to use LVDS port for interfacing tft LCD.But the point is in LVDS port, there is one "FCE" pin (control pin for NAND flash) multiplexed with same port.

If I want to use this pin for both the peripherals, i.e. for LVDS display and Nand Flash how it can be multiplexed / used.

Is there any special multiplexer component readily available?

Can't get I2C to work

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Hi,

I am trying to control a digital pot via I2C, but I can't get it to work. I have added the code for initialization and transmission below. The clock for I2C channel 1 is enabled and the SCL and SDA pins are initialized as direct alternative function. The problem is that after setting the ST bit (issuing a start condition), the TDRE bit will not be set (as well as BBSY and START). Does someone have an idea about what I am doing wrong here?

Thanks in advance!



Code for initialization:

// Initial settings
RIIC1.RIICnCR1.UINT8[0] &= ~RIICn_RIICnCR1_ICE; // Clear ICE: output pins not driven
RIIC1.RIICnCR1.UINT8[0] |= RIICn_RIICnCR1_IICRST; // Set IICRST: RIIC reset
RIIC1.RIICnCR1.UINT8[0] |= RIICn_RIICnCR1_ICE; // Set ICE: Internal reset

// Bit rate
RIIC1.RIICnMR1.UINT8[0] |= 0x10; // P0/2
RIIC1.RIICnBRL.UINT8[0] = 18; // TODO
RIIC1.RIICnBRH.UINT8[0] = 19; // TODO
RIIC1.RIICnFER.UINT8[0] |= RIICn_RIICnFER_NACKE; // Everything else default

// Set interrupts
RIIC1.RIICnIER.UINT32 = 0; // TODO

// Release reset
RIIC1.RIICnCR1.UINT8[0] &= ~RIICn_RIICnCR1_IICRST;


Code for transmitting:

bool hasError = false;

// Wait for the bus to be free
while ((RIIC1.RIICnCR2.UINT8[0] & RIICn_RIICnCR2_BBSY) > 0);

// Issue start condition
RIIC1.RIICnCR2.UINT8[0] |= RIICn_RIICnCR2_ST;

// Wait for transmit buffer empty
while (!hasError)
{
  if ((RIIC1.RIICnSR2.UINT8[0] & RIICn_RIICnSR2_NACKF) > 0)
  {
    hasError = true;
  }
  else if ((RIIC1.RIICnSR2.UINT8[0] & RIICn_RIICnSR2_TDRE) > 0)
  {
    break;
  }
}

if (!hasError)
{
  // Transmit the slave address and write bit
  RIIC1.RIICnDRT.UINT8[0] = (POT_A_ADDRESS << 1);
}

// Wait for transmit buffer empty
while (!hasError)
{
  if ((RIIC1.RIICnSR2.UINT8[0] & RIICn_RIICnSR2_NACKF) > 0)
  {
    hasError = true;
  }
  else if ((RIIC1.RIICnSR2.UINT8[0] & RIICn_RIICnSR2_TDRE) > 0)
  {
    break;
  }
}

if (!hasError)
{
  // Transmit the command
  RIIC1.RIICnDRT.UINT8[0] = 0x00;
}

// Wait for transmit buffer empty
while (!hasError)
{
  if ((RIIC1.RIICnSR2.UINT8[0] & RIICn_RIICnSR2_NACKF) > 0)
  {
    hasError = true;
  }
  else if ((RIIC1.RIICnSR2.UINT8[0] & RIICn_RIICnSR2_TDRE) > 0)
  {
    break;
  }
}

if (!hasError)
{
  // Transmit the value
  RIIC1.RIICnDRT.UINT8[0] = value;

  // Wait for data transmitted
  while ((RIIC1.RIICnSR2.UINT8[0] & RIICn_RIICnSR2_TEND) == 0);
}

// Reset stop detection flag
RIIC1.RIICnSR2.UINT32 &= ~RIICn_RIICnSR2_STOP;

// Issue stop condition
RIIC1.RIICnCR2.UINT32 |= RIICn_RIICnCR2_SP;

// Wait for stopped
while ((RIIC1.RIICnSR2.UINT32 & RIICn_RIICnSR2_STOP) == 0);

// Reset registers
RIIC1.RIICnSR2.UINT32 &= ~RIICn_RIICnSR2_NACKF;
RIIC1.RIICnSR2.UINT32 &= ~RIICn_RIICnSR2_STOP;

RZA1 RSK USB Host Bandwidth Issue

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I am attempting to capture Visible Light images using a USB Webcam that operates with USB Bulk Mode type transfers. The Frame is a 640x480 YUYV frame at 614400 bytes.

This webcam and the same sequence of commands works on the following machines:

  1. Raspberry Pi ( ARM Linux Board )
  2. Native Ubuntu 14.04 Linux machine
  3. Virtualbox Linux Ubuntu 14.04 on a Windows 7 host machine
  4. Windows 7 machine

However, when I try to capture on the RZ/A1 RSK, I get corrupted images, and kernel messages that indicate bandwidth issues and lost/corrupt frames. I’ve attached one of the garbled images here:

 The capturing in Linux is done using the standard V4L2 ( Video4Linux2 ) framework with the standard UVC video Linux drivers.

 I’ve done quite a bit of research and I believe the issue is bandwidth on the USB Host controller ( r8a66597 hcd ). I’ve plugged the camera directly into the RSK with no hubs and no other USB devices attached so there is no bus contention with any other USB devices. The datasheet says the controller is fully USB 2.0 high speed compliant and I've modified the driver to print the speed when communication is initiated. The driver says it is operating in High Speed mode.

 I’ve tried various UVC driver “Quirks” to try to improve performance and I’ve played with Linux nicety values and scheduling. Unfortunately I haven’t been able to get it to work.

 Here are the commands:

sudo dmesg -c

sudo rmmod uvcvideo

sudo chmod 777 /sys/module/usbcore/parameters/autosuspend

sudo echo -1 > /sys/module/usbcore/parameters/autosuspend

sudo modprobe uvcvideo nodrop=1 timeout=15000 quirks=640

sudo chmod 777 /sys/module/uvcvideo/parameters/trace

sudo echo 0xffff > /sys/module/uvcvideo/parameters/trace

sudo rm webcam.yuyv

sudo nice -n -19 -f 99 fswebcam -v --device /dev/video0 -D 1 --input 0 --resolution 640x480 -S 2 --no-banner -p YUYV --save webcam.yuyv

eog webcam.yuyv

 Are there any tricks I can do to improve performance and receive my frame ungarbled? Thanks.

LVDS port and NAND flash port Multiplexing in RZ/A1 H

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In RZ/A1M MPU, port number P5_5 pin is demultiplexed with following alternative options:-
 
P5_5 Alternative 1: TXOUT1M
P5_5 Alternative 2: LCD1_DATA5
P5_5 Alternative 3: LCD0_DATA21
P5_5 Alternative 4: DV1_DATA5
P5_5 Alternative 5: AUDIO_XOUT
P5_5 Alternative 6: TIOC0C
P5_5 Alternative 7: FCE
P5_5 Alternative 8: DV0_DATA13
Ref: - RZ/A1 H manual reference page No: 2623
 
Out of above 8 alternatives, we need to use this pin for two functions as :
  Alternative 1: TXOUT1M (LVDS data output1) and
  Alternative 7: FCE (Control Pin for NAND flash interfacing)
 
We want to use both these functions simultaneously (want to interface LCD display and NAND Flash Memory).
In RSK board only one function is used at a time.
Can you suggest any way to multiplex these two functions on single pin?

Ethernet Issues on RSK RZA1H:

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Ethernet Issues on RSK RZA1H:

Hi, We are trying to bring up some streaming application on RSK RZA1H. While running it on RSK RZA1H, we end up with the errors as below.

sh-eth r7s72100-ether eth0: Receive Descriptor Empty                            
sh-eth r7s72100-ether eth0: Receive FIFO Overflow                               
irq 359: nobody cared (try booting with the "irqpoll" option)                   
CPU: 0 PID: 469 Comm: klogd Not tainted 3.14.28-ltsi #6                         
[<c0011b28>] (unwind_backtrace) from [<c00101a4>] (show_stack+0x10/0x14)        
[<c00101a4>] (show_stack) from [<c0044bd4>] (__report_bad_irq.isra.7+0x24/0xa8)
[<c0044bd4>] (__report_bad_irq.isra.7) from [<c0044e84>] (note_interrupt+0x1cc/)
[<c0044e84>] (note_interrupt) from [<c0043518>] (handle_irq_event_percpu+0x168/)
[<c0043518>] (handle_irq_event_percpu) from [<c0043560>] (handle_irq_event+0x28)
[<c0043560>] (handle_irq_event) from [<c00456f4>] (handle_fasteoi_irq+0xa0/0xe0)
[<c00456f4>] (handle_fasteoi_irq) from [<c0042e94>] (generic_handle_irq+0x20/0x)
[<c0042e94>] (generic_handle_irq) from [<c000dd98>] (handle_IRQ+0x60/0x80)      
[<c000dd98>] (handle_IRQ) from [<c00084cc>] (gic_handle_irq+0x38/0x50)          
[<c00084cc>] (gic_handle_irq) from [<c0010c00>] (__irq_svc+0x40/0x50)           
Exception stack(0xc12e9e50 to 0xc12e9e98)                                       
9e40:                                     c12e9e98 00404100 00000100 00000000   
9e60: 0000000e c12e8018 00000000 c12e9f3c c04f6178 c04f4080 000a39e8 00404100   
9e80: 0000000a c12e9e98 c001e764 c001e7b8 20070113 ffffffff                     
[<c0010c00>] (__irq_svc) from [<c001e7b8>] (__do_softirq+0x6c/0x1f4)            
[<c001e7b8>] (__do_softirq) from [<c001eb5c>] (irq_exit+0x80/0xdc)              
[<c001eb5c>] (irq_exit) from [<c000dd9c>] (handle_IRQ+0x64/0x80)                
[<c000dd9c>] (handle_IRQ) from [<c00084cc>] (gic_handle_irq+0x38/0x50)          
[<c00084cc>] (gic_handle_irq) from [<c0010c00>] (__irq_svc+0x40/0x50)           
Exception stack(0xc12e9f08 to 0xc12e9f50)                                       
9f00:                   c04d6704 00000000 00000001 00000000 00000095 00000000   
9f20: 00000000 00002000 c04f6178 00000ce8 000a39e8 00000000 00000000 c12e9f50   
9f40: c03a08c4 c0041cb8 40070113 ffffffff                                       
[<c0010c00>] (__irq_svc) from [<c0041cb8>] (do_syslog+0xf8/0x460)               
[<c0041cb8>] (do_syslog) from [<c000d500>] (ret_fast_syscall+0x0/0x30)          
handlers:                                                                       
[<c021847c>] sh_eth_interrupt                                                   
Disabling IRQ #359                                                              
nfs: server 192.168.1.14 not responding, still trying

Can anyone please suggest some solution for this?

Thanks & regards,
Raja.A.

How to detect A1H vs. A1M?

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I'd like to be able to detect at run-time whether I'm on a A1M or A1H chip.  Is there an ID register somewhere?

I couldn't find one in the manual - but I could be searching for the wrong terminology...

Thanks.

Linaro Toolchain

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I am using rskrza1_bsp on ubuntu 14.04 32 bit machine. When I start the build with linaro 4.9 2014 toolchain, the build fails. After going through the error I checked the toolchain at corresponding link. But it was unavailable. Probably the reason is that Linaro have discontinued 4.9 2014 toolchain. So, how to build the linux using buildroot?


RGA library: R_GRAPHICS_Initialize failing

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(This is sort of a continuation of the months-old topic "How to add RGA library to existing e2studio project?", but I thought it best to start a new thread).

I'm trying to use the "C" function calls in the RGA library, but am having trouble with my initialization.  I set up my frame buffers and call R_GRAPHICS_Initialize().  It then calls back to the OSPL layer a few times and eventually calls R_OSPL_ToUncachedAddress(0x0).

This results in a "E_OTHERS" (7) error code.

I'm guessing that the address 0x0 being passed to R_OSPL_ToUncachedAddress is incorrect - and I'm further guessing that this value came from the configuration information I passed in to R_GRAPHICS_Initialize.

Does anyone have any insights into how I might chase this down?

Thanks.

RZA1 qspi_app kernel NULL pointer dereference with large files

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I'm successfully using the renesas qspi_app and qspi kernel module to write small files ( severl kb ) to the QSPI flash on the RZA1 RSK while running an XIP Kernel. I am using the "single" qspi configuration - so I specify "s" instead of "d" as shown in the tool's help menu.

I have the latest code from github:

https://github.com/renesas-rz/rza1_qspi_flash

I figured out how to modify the u-boot environment variables from Linux userspace and now I am trying to write a Linux Kernel image to a difference location in flash so that I can perform Kernel Firmware updates in the field.

I mount a USB drive with a slightly different xipImage.bin ( 4825612 bytes ) and attempt to write it to flash with the following commands:

cp /mnt/usb/xipImage.bin /tmp/ # copy image to ramdisk - it turns out not to matter, same failure occurs
rmmod /root/usb/r8a66597-hcd.ko # I remove the usb after copying to the ram disk just to rule out USB 
/mnt/apps/qspi_app e s 0x800000
/mnt/apps/qspi_app p s 0x800000 /tmp/xipImage.bin

It always fails at some non-deterministic point in time as shown below:

Erase Complete. Status = OK
Writing out 4825612 bytes
Wrote this many bytes: 1024 [4824588 remaining]
Wrote this many bytes: 1024 [4823564 remaining]
Wrote this many bytes: 1024 [4822540 remaining]
...

Wrote this many bytes: 1024 [2896396 remaining]
Wrote this many bytes: 1024 [2895372 remaining]
Wrote this many bytes: 1024 [2894348 remaining]
Wrote this many bytes: 1024 [2893324 remaining]
Wrote this many bytes: 1024 [289230Unable to handle kernel NULL pointer dereference at virtual address 00000000
0 remaining]
Wrpgd = c12e8000
ote this many by[00000000] *pgd=095ac831tes: 1024 [28912, *pte=0000000076 remaining]
W, *ppte=00000000rote this many b
ytes: 1024 [2890Internal error: Oops: 80000007 [#1] ARM
Modules linked in: qspi_flash(O) [last unloaded: r8a66597_hcd]
CPU: 0 PID: 685 Comm: qspi_app Tainted: G O 3.14.28-ltsi #92
task: c1200400 ti: c190c000 task.ti: c190c000
PC is at 0x0
LR is at 0x0
pc : [<00000000>] lr : [<00000000>] psr: 40000013
sp : c190dec8 ip : c190dee8 fp : c190c000
r10: c1e59140 r9 : c199b540 r8 : 00000000
r7 : 00000030 r6 : 00000030 r5 : 00000030 r4 : c12bca00
r3 : 00000000 r2 : ffffffd4 r1 : 00000000 r0 : c190dee4
Flags: nZcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user
Control: 18c53c7d Table: 092e8059 DAC: 00000015
Process qspi_app (pid: 685, stack limit = 0xc190c230)
Stack: (0xc190dec8 to 0xc190e000)
dec0: c199b540 bf1627e4 00010301 bf6014ec c19c8c00 00000000
dee0: 00000000 00000000 00000005 c190df00 bf6001c0 bf6001dc a0000013 c12bca00
df00: 00000000 00000030 00000030 c199b540 b6fc3000 c1e59140 c190c000 bf15ff20
df20: 00000000 00000030 bf1627bc c190c000 c190df80 c199b540 b6fc3000 c190df80
df40: 00000030 00000030 b6fc3000 00000000 be85f71c bf08ecc4 c199b540 b6fc3000
df60: 00000030 00000000 00000000 c199b540 c199b540 00000030 b6fc3000 bf08f1cc
df80: 00000000 00000000 00000030 00000030 b6fc3000 b6f9cd80 00000004 bf006044
dfa0: c190c000 bf005ec0 00000030 b6fc3000 00000001 b6fc3000 00000030 00000000
dfc0: 00000030 b6fc3000 b6f9cd80 00000004 00000030 00000024 00009150 be85f71c
dfe0: 00000000 be85f194 b6ed2f78 b6f29bdc 60000010 00000001 00000000 00000000
Code: bad PC value
252 remaining]
---[ end trace b8c0feeeccde825c ]---

How can I reliably write larger files to flash with the qspi_app? Thanks!

RZG1E internal eMMC card read speed.

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Hi All,

RZG1E has 8GB eMMC chip MTFC8GLWDQ-3M AIT Z .

Can anyone please letme know max read speed of this eMMC.I am getting only 20 MBps 

read speed.

Thanks,

Tushar

RZA1 Unique Chip Value

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Hi,

Is there a unique value per chip ( processor ID / Serial ) for the RZA1?

I looked in /proc/cpuinfo and the Serial string is all zeros. I also tried searching the hardware manual for "unique", "serial", "model", but haven't found anything. Thanks.

$ cat /proc/cpuinfo

processor : 0
model name : ARMv7 Processor rev 0 (v7l)
Features : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpd32
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x3
CPU part : 0xc09
CPU revision : 0

Hardware : rskrza1
Revision : 0000
Serial : 0000000000000000

XIP Linux max rom size?

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Hi, all

I have two question.

1. Is there a maximum ROM size that can be configured with XIP Linux on RZ / A1M?

and Can the kernel and applications be stored in the SPI flash, and the image data stored in the NAND flash?

2. Which Nand flash types are supported? (SLC, MLC, TLC, Serial)

thanks

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