Hi,

I am using an R7S721033VCFP with Linux 4.9.98. I have enabled USB Gadget to use serial over USB.

When I did it the serial is working well, but the USB flash drive is not working anymore.

The modifications in the kernel were:

->Device Drivers
        ->USB support
<*>     R8A66597 HCD support
<*>     Renesas USBHS HCD support
<*>     USB Mass Storage support
<*>     USB Attached SCSI
		<*>     Inventra Highspeed Dual Role Controller (TI, ADI, AW, ...)
			   MUSB Mode Selection (Dual Role mode)

-> Device Drivers

<*> USB support
         <*> USB Gadget Support
              [*] Serial gadget console support
              -> USB Peripheral Controller
<*> Renesas R8A66597 USB Peripheral Controller 
                  <*> Renesas USBHS controller
<*> USB Gadget Drivers (Serial Gadget (with CDC ACM and CDC OBEX support))

In my device tree I did the follow modification:

Someone has any ideia why the g_serial and the mass storage is not working in the same USB port as an OTG?
Thanks.

Currently i am working on a A1H RSK based board using linux 4.9.  Board is connected to the GSM UC20 module using USB method for communicating. The GSM module provide 5 ttyUSB ports (ttyUSB0, ttyUSB1, ttyUSB2, ttyUSB3, ttyUSB4 ). and ttyUSB2 is used for acessing AT commands and ttyUSB3 is for ppp connectivity. But getting kernel crash while turning off the GSM. What will be the reason for this, is it related to kernel problem?

Logs are attached in below.

option1 ttyUSB0: GSM modem (1-port) converter now disconnected from ttyUSB0
option 1-1:1.0: device disconnected
option1 ttyUSB1: GSM modem (1-port) converter now disconnected from ttyUSB1
option 1-1:1.1: device disconnected
Unable to handle kernel paging request at virtual address 5d35d856
pgd = c0004000
[5d35d856] *pgd=00000000
Internal error: Oops: 5 [#1] THUMB2
Modules linked in: ryb_phase_detector(O) led(O) lcd(O) keypad(O) gsm_uc20(O)
CPU: 0 PID: 5254 Comm: kworker/0:2 Tainted: G           O    4.9.76-g727d873-dirty #56
Hardware name: Generic R7S72100 (Flattened Device Tree)
Workqueue: usb_hub_wq hub_event
task: c6a52bc0 task.stack: c78be000
PC is at pipe_setting+0x154/0x294
LR is at arm_heavy_mb+0xb/0x20
pc : [<bf9f5a50>]    lr : [<bf80a647>]    psr: 000e00b3
sp : c78bfd18  ip : 00000000  fp : ffffffed
r10: 00000000  r9 : c88ff000  r8 : c6a96b40
r7 : 00000000  r6 : c7ada580  r5 : 0000000b  r4 : c797e930
r3 : 5d65cc4c  r2 : 00000003  r1 : 0000000b  r0 : 5d35d82a
Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA Thumb  Segment none
Control: 58c53c7d  Table: 0eba4059  DAC: 00000051
Process kworker/0:2 (pid: 5254, stack limit = 0xc78be208)
Stack: (0xc78bfd18 to 0xc78c0000)
fd00:                                                       00000000 c797e930
fd20: c6a96b40 0000000e c797e9a0 c7ada580 c6a96b48 bf9f60a3 c6a96b48 c797e930
fd40: c6a96b40 0000000e c797e9a0 ffffff94 c6a96b48 00000000 ffffffed bf9f62b7
fd60: c7aebf80 c797e930 c6aa3680 00000000 c7aebf80 200e0093 ffffff94 bf9f69cb
fd80: ffffff94 c7aebf80 ffffff94 c7aebf80 c7bb4138 c7aebf94 c7bb4150 c797e800
fda0: c798c4b0 bf9e3153 c7bb4138 c7a5fc00 c7a5fc00 00000000 00000038 bf9e4971
fdc0: c7bb4138 00000002 c6aa2688 bf9e49b7 c6929a20 c7a5fc70 c7a5fc00 c797e800
fde0: c6929a00 bf9e5f53 c6929a20 00000004 00000002 c6929a20 c798c4b0 c0033de0
fe00: c797e800 c6929a00 c7a37800 ffffffed c7a37a00 bf98b4df c6929a44 c6929a54
fe20: c6929a20 bf98b53f c6929a44 c6929a20 c7b85c2c bf98ac97 c6929a20 00000000
fe40: c7a5fc70 bf989603 c7bb4138 bf9e860b c6929a00 bf9e46dd 00000007 c7a5fc00
fe60: 00000000 00000002 c797e800 bf9e4a85 00000000 c7a5fc00 00000000 00000000
fe80: c7a5fc70 c7a5fca4 c7a37800 bf9df9d3 c7a37afc 00000001 00000402 c797fc00
fea0: c7a37800 00000001 ffffffed bf9e0951 ffffffff 00000000 00000001 c797fc00
fec0: c797e800 00000001 c7a37a7d 00000000 c7a37c20 c7a37c00 c797fca4 c7a37974
fee0: c7a37974 c7a37808 00000000 c7b88140 00010402 c79e9700 c696de00 c7a72700
ff00: c7a37afc c001f204 00000000 c7ee8300 00000000 c7a72718 00000008 bf81b511
ff20: c7a72700 c7a37afc c7a72700 c001f204 c001f204 c78be000 c001f218 c0022e00
ff40: c7a72718 bf81bc27 00000000 c6aa2100 00000000 c7a72700 bf81ba6d 00000000
ff60: 00000000 00000000 00000000 bf81e627 c6a52d68 00000000 00000000 c7a72700
ff80: 00000000 c78bff84 c78bff84 00000000 c78bff90 c78bff90 ffffffff c6aa2100
ffa0: bf81e5a7 00000000 00000000 bf805101 00000000 00000000 00000000 00000000
ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
ffe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000
[<bf9f5a50>] (pipe_setting) from [<bf9f60a3>] (start_transfer+0x513/0x65c)
[<bf9f60a3>] (start_transfer) from [<bf9f62b7>] (finish_request+0xcb/0xda)
[<bf9f62b7>] (finish_request) from [<bf9f69cb>] (r8a66597_urb_dequeue+0x4b/0x56)
[<bf9f69cb>] (r8a66597_urb_dequeue) from [<bf9e3153>] (usb_hcd_flush_endpoint+0x45/0x76)
[<bf9e3153>] (usb_hcd_flush_endpoint) from [<bf9e4971>] (usb_disable_endpoint+0x41/0x5a)
[<bf9e4971>] (usb_disable_endpoint) from [<bf9e49b7>] (usb_disable_interface+0x2d/0x2e)
[<bf9e49b7>] (usb_disable_interface) from [<bf9e5f53>] (usb_unbind_interface+0x4b/0x158)
[<bf9e5f53>] (usb_unbind_interface) from [<bf98b4df>] (__device_release_driver+0x49/0x94)
[<bf98b4df>] (__device_release_driver) from [<bf98b53f>] (device_release_driver+0x15/0x1e)
[<bf98b53f>] (device_release_driver) from [<bf98ac97>] (bus_remove_device+0x73/0x90)
[<bf98ac97>] (bus_remove_device) from [<bf989603>] (device_del+0xbd/0x132)
[<bf989603>] (device_del) from [<bf9e4a85>] (usb_disable_device+0xcd/0x11e)
[<bf9e4a85>] (usb_disable_device) from [<bf9df9d3>] (usb_disconnect+0x49/0x10e)
[<bf9df9d3>] (usb_disconnect) from [<bf9e0951>] (hub_event+0x421/0xa50)
[<bf9e0951>] (hub_event) from [<bf81b511>] (process_one_work+0x103/0x1e2)
[<bf81b511>] (process_one_work) from [<bf81bc27>] (worker_thread+0x1bb/0x288)
[<bf81bc27>] (worker_thread) from [<bf81e627>] (kthread+0x81/0x92)
[<bf81e627>] (kthread) from [<bf805101>] (ret_from_fork+0x11/0x30)
Code: 35c3 f3c1 11c0 310a (f850) 2021
---[ end trace 523e122004ea6f90 ]---

Hi everyone,

We're working on RZ/G1n development board. We got a situation where we need to test the I2C bus performance, let me know how to change the I2C clock frequency during the run time . i need to write a single piece of code to test all the frequency (standard mode, fast mode, & etc).

Thanks,

Mohd habeeb ur rehman

Hi,

I am trying to use RZ/N1L and the goal project "tcp_server" to have an easy TCP throughput test.

I have downloaded the FW into the board without any modification, however I can't find a good way to test it.

I have tested several tools like TCP Test Tool, TcpClientServer, TCP Socket debugger,

but I can only see CRC error messages showing on the debug screen.

Could anyone give me an advise how to do the test?

Or any recommend tool?

Thanks in advance.

Hi,

I am using an R7S721033VCFP with Linux 4.9.98. I would like to use my target as a flash drive device to transfer files between the host(PC)-device(RZ/A1) and use the same port USB at the same time as a serial port.

I have enabled USB Gadget to use CDC Composite (ACM and Mass storage).

In my device tree I did the following modification:

But neither of both functions (ACM or Mass Storage) are working. The driver (e.g:/dev/ttyGS0) is not create.

In my serial console log debug I have:

For the mass storage I was thinking to do it to select the file for driver mass storage  to use:

But the directory doesn't exist.

Does someone have any idea why it is not working?
Thanks.

Dear all,

We're working on RZ/G1N i-wave development board. We've got ER-TFT043-3 LCD display with us, based on the LCD datasheet connections are made, but we don't have any idea how to drive LCD, what are the commands or packages required to start working with it. Please let us know anything that would help us to kick start.

Thanks,

Mohd habeeb ur rehman

I am following r01qs0022ed0005-rzn1d-quick-start-guide document for initial startup.

 I am getting Error while booting Linux. Please check and help to get support.

 I tried till Chapter 3.1.

• 1. Bring up the board with Linux and U-Boot

After point 7.

• Run Linux

I am getting below error. Not able to sort it out.

• Unknown command '0x80008000' - try 'help'

Please find Command prompt log attached FYR.

Hi,

I'm modifying the driver axfs. But I'm having difficulties to find the file system size that is mounted.

I'm looking for a variable with the number of blocks to calculate or a variable with this info FS size.

I looked at the struct axfs_super, but the variables: "size" or "blocks" in this struct are 0. I can read the follow variables of this struct in the file axfs_super.c:

• magic
• phys_start_addr
• virt_start_addr

Anyone has a tip on how to find the size of the file system mounted?

Thanks

HI,

I am following"r01qs0022ed0005-rzn1d-quick-start-guide". I am stuck up at running Linux on Cortex A7 and GOAL Sample Application on Cortex M3 simultaneously on RZ/N1D CPU Board + Expansion B.

I am running Goal project Chase lights  "00410_goal\chase_lights" in ARM Cortex M3.

Linux kernel and dtb running in Flash for Cortex A7. I am able to ping with J22 and J23 after login with root and using ifconfig eth0 "IP0" up and ifconfig eth0 "IP1" up. Providing Flash linux device tree "uImage-rzn1d400-db-both-gmacs.dtb" with DFU utility in windows.

Once we provide => setenv bootcmd "sf probe && sf read 0x4000000 d0000 80000 && rzn1_start_cm3 && sleep 4 && sf read 0x8ffe0000 b0000 20000 && sf read 0x80008000 1d0000 600000 && bootm 0x80008000 - 0x8ffe0000"
=> saveenv

Reset the board – SW4. After the autoboot, only bin with A7 is running (Ping happens). But binary in Cortex M3 stops.

Please also clarify below  points also

1. How many ethernets can run individually with Cortex A7 and Cortex M3.

2. We need to run all 5 ethernets simultaneously, Please share if any application notes and projects available.

Hoping for a faster reply..

Thanks and regards,

Mohan 

Dear sirs,

I'm trying to work with linux on Stream It v2.3.0444.

I made all of the steps mentioned here https://elinux.org/RZ-A/Boards/Stream-it

up to "Program u-boot into QSPI Flash".

Now I'm getting an error:

timur@virtual-machine:~/Renesas/rza_linux-4.19_bsp$ ./build.sh jlink u-boot
/home/timur/Renesas/rza_linux-4.19_bsp
Build Environment set
-------------------------------------------------------
Download binary files to on-board RAM or SPI Flash
-------------------------------------------------------
'output/u-boot-2017.05/u-boot.bin' -> '/tmp/u-boot.bin'
SEGGER J-Link Commander V6.52 (Compiled Sep 27 2019 17:53:46)
DLL version V6.52, compiled Sep 27 2019 17:53:31

J-Link Command File read successfully.
Processing script file...

J-Link connection not established yet but required for command.
Connecting to J-Link via USB...O.K.
Firmware: J-Link Lite V9 compiled May 17 2019 10:18:57
Hardware version: V9.00
S/N: 229001536
License(s): GDB
VTref=3.309V
Target connection not established yet but required for command.
Device "R7S721001" selected.

Connecting to target via JTAG
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[1]: APB-AP (IDR: Not set)
Using preconfigured AP[1] as APB-AP
AP[1]: APB-AP found
ROMTbl[0][0]: CompAddr: 80002000 CID: B105900D, PID:04-003BB906 CTI
ROMTbl[0][1]: CompAddr: 80008000 CID: B105900D, PID:04-003BB906 CTI
ROMTbl[0][2]: CompAddr: 8000C000 CID: B105900D, PID:04-003BB906 CTI
ROMTbl[0][3]: CompAddr: 8000F000 CID: B105F00D, PID:04-000A3FA9 ???
ROMTbl[0][4]: CompAddr: 80020000 CID: B105100D, PID:04-000BB4A9 ROM Table
ROMTbl[1][0]: CompAddr: 80021000 CID: B105900D, PID:04-001BB961 TMC
ROMTbl[1][1]: CompAddr: 80022000 CID: B105900D, PID:04-003BB906 CTI
ROMTbl[1][2]: CompAddr: 80023000 CID: B105900D, PID:04-004BB912 TPIU
ROMTbl[1][3]: CompAddr: 80024000 CID: B105900D, PID:04-001BB908 CSTF
ROMTbl[1][4]: CompAddr: 80030000 CID: B105900D, PID:04-000BBC09 Cortex-A9
Found Cortex-A9 r3p0
6 code breakpoints, 4 data breakpoints
Debug architecture ARMv7.0
Data endian: little
Main ID register: 0x413FC090
I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
System control register:
Instruction endian: little
Level-1 instruction cache enabled
Level-1 data cache disabled
MMU disabled
Branch prediction enabled
Memory zones:
[0]: Default (Default access mode)
[1]: AHB-AP (AP0) (DMA like acc. in AP0 addr. space)
[2]: APB-AP (AP1) (DMA like acc. in AP1 addr. space)
Cortex-A9 identified.
Halting CPU for downloading file.
Downloading file [/tmp/u-boot.bin]...

****** Error: Failed to prepare for programming.
Error while determining flash info (Bank @ 0x18000000)
Unspecified error -1

Script processing completed.

============== ****** Error: Failed to prepare for programming. ==============

Could you please help me to fix it?

Timur.

On an RZ/A1, I have working code to read a single byte from a chip on the SPI bus.  (The RZ is Master).  However, that same chip also has modes that are 3 or more bytes long.

To change the size of the data transfer, it seems that I need to change the SPSLNx bits in SPSCR.  However, the User Manual says that I can't reliably change that register while the SPE bit is ON.  However, clearing that bit will perform an initialization of the SPI interface.

Am I missing a step here?  Or is doing a reset the right way to change the sequence length?

Thanks.

Currently i am working on Rz A1H  with qt application using linux bsp 4.9. And  i found some issue while trying qt sample application calculator.

The problem is the calcultor application is waiting for random: crng init done (at start up).

But it is taking longer time to initialize the random number generator, some times it is taking approximatly 2-3 minutes to initialization. Is it any possibility available for improving crng initialization time.

Hello!

I'am working with Stream It kit board version v2.3.0444 and rza_linux-4.19_bsp.
Since axfs is read-only file system I want to work with jffs2 'cause it's R/W file system.
I made the steps from spibsc-qspi.txt, but now I'am getting an error:

=> run jboot
SF: Detected mx25l51235f with page size 256 Bytes, erase size 64 KiB, total 64 MiB
device 0 offset 0xc0000, size 0x40000
SF: 262144 bytes @ 0xc0000 Read: OK
device 0 offset 0x100000, size 0x500000
SF: 5242880 bytes @ 0x100000 Read: OK
Wrong Image Format for bootm command
ERROR: can't get kernel image!
XIP Invalid Image ... OK
No FDT memory address configured. Please configure
the FDT address via "fdt addr <address>" command.
Aborting!
ERROR: booting os 'Invalid OS' (0) is not supported
=>

My environment:
=> printenv
baudrate=115200
bootargs=ignoreloglevel root=/dev/mtdblock9 rw rootfstype=jffs2
bootcmd=run xsa_boot
bootdelay=3
cmdline_common=ignore_loglevel earlyprintk earlycon
dtb_lcdfb_dyn=fdt set /display@fcff7400 fb_phys_addr <0x00000000>
dtb_lcdfb_fixed=fdt set /display@fcff7400 fb_phys_addr <0x60000000>
dtb_mem_ram=fdt memory 0x20000000 0x00300000
dtb_mem_sdram=fdt memory 0x0C000000 0x02000000
dtb_read_ram=sf probe 0; sf read 20200000 C0000 8000; fdt addr 20200000 ; setenv addr_dtb 20200000
dtb_read_sdram=sf probe 0; sf read 0CF00000 C0000 8000; fdt addr 0CF00000 ; setenv addr_dtb 0CF00000
ethact=sh_eth
fs_axfs=rootfstype=axfs rootflags=physaddr=0x18800000
fs_mtd=root=/dev/mtdblock0
ipaddr=192.168.0.55
j1=sf probe 0 ; sf read 0x09800000 C0000 40000 ;
j2=sf read 0x09000000 100000 500000
j3=bootm start 0x09000000 - 0x09800000 ; bootm loados
jboot=run j1 j2 j3; setenv bootargs ${jbootargs}; fdt chosen; bootm go
jbootargs=ignoreloglevel root=/dev/mtdblock9 rw rootfstype=jffs2
s_boot=run dtb_read_sdram dtb_mem_sdram dtb_lcdfb_fixed; setenv bootargs ${cmdline_common} ${fs_mtd}; fdt chosen; run uImg
sa_boot=run dtb_read_sdram dtb_mem_sdram dtb_lcdfb_fixed; setenv bootargs ${cmdline_common} ${fs_axfs}; fdt chosen; run uImg
serverip=192.168.0.1
stderr=serial_sh
stdin=serial_sh
stdout=serial_sh
uImg=qspi single; cp.b 0x18200000 0C800000 0x400000; bootm start 0C800000 - 0CF00000; bootm loados ; bootm go
xImg=qspi single; setenv cmd bootx 0x18200000 ${addr_dtb}; run cmd
xa_boot=run dtb_read_ram dtb_mem_ram dtb_lcdfb_dyn; setenv bootargs ${cmdline_common} ${fs_axfs}; fdt chosen; run xImg
xsa_boot=run dtb_read_sdram dtb_mem_sdram dtb_lcdfb_fixed; setenv bootargs ${cmdline_common} ${fs_axfs}; fdt chosen; run xImg
xsa_eth_boot=run dtb_read_sdram dtb_mem_sdram; fdt set /display@fcff7400 status dis; setenv bootargs ${cmdline_common} ${fs_axfs}; fdt chosen; run xImg

Environment size: 1937/262140 bytes

Could you please help me to solve this issue.

Thank you!

One more question, am I right that it is impossible to use SDRAM, LCD and SD-cart simultaneously?

Timur.

Hi all, 

    Anyone figure out how to use the dmalloc *.so to detect memory leaks on this platform?  I've done the following steps:

- enabled dmalloc in the buildroot menuconfig, rebuilt the rootfs

- LD_PRELOAD=libdmallocthcxx.so ./<my-cpp-program>.stripped

I'm getting this error:  undefined reference to atexit in libdmallocthcxx.so

Thanks, Charles

Currently i am working on RSK based with touch display. using linux bsp 4.9 and using same Focaltech FT5X06 5 point touchscreen hardware and driver. But its touch getting some issue.

I just enebled Event debugging in input event support.

I can see debug message when i touch on the screen normally, But it continuously  debug  when i release also,  what will be the issue?.

Is it any additional calibration required for make it work properly, any calibration software/method available?

Dear All,

We're working on i-wave RZ/G1n evaluation board. it has PCIe port on its carrier board. linux kernel 3.10.31 source code is built and uImage is flashed onto the board.

Please let us know how it scans the PCIe device during run-time. where can i find the code responsible for device detection during run-time in the source code, and by

what mechanism it detects the device(polling or interrupt).

Thanks,

Mohd habeeb ur rehman 

Hi!

I work with Stream It v2.3.0444.
When I worked with linux on it I disabled 2nd QSPI on board like it is mentioned on the page:
https://elinux.org/RZ-A/Boards/Stream-it

Now I need to work with regular examples ( default StreamIt application ) without linux but all of them need a second QSPI.
What do I need to change in linker file to work with only one QSPI?

Thank you!

Timur.

Dear,

I'm trying to use a JFFS2 partition on Renesas RSK board with the lastest BSP Linux 4.19.

The BSP is working in XIP mode with AXFS partition using the QSPI nor flash with direct access (0x18000000).

To use the QSPI flash not in XIP mode i understand that the driver SPIBSC is needed.

But this driver is not configured in the board device tree.

I tryied the following configuration (r7s72100-rskrza1.dtb) :

&spibsc0 {
    status = "okay";

    flash@0 {
    /*    compatible = "spansion,s25fl512s", "jedec,spi-nor"; */
        compatible = "jedec,spi-nor";    /* let it auto-detect the flash */
        reg = <0>;

        spi-max-frequency = <66000000>;

        /* SPI Mode 3 */
        spi-cpol;
        spi-cpha;
        m25p,fast-read;

        partitions {
            compatible = "fixed-partitions";
            #address-cells = <1>;
            #size-cells = <1>;

            partition@800000 {
                label = "spibsc-rootfs";
                reg = <0x00800000 0x00800000>;    /* 8MB */
            };
        };
    };
};

But i get the following error :

[    1.741433] List of all partitions:
[    1.745103] No filesystem could mount root, tried:
[    1.745113]  jffs2
[    1.750334]
[    1.753895] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)

It seems to be a mistake in the dtb file,

Is there an example for this configuration ?

Thank,

Stéphane

Good day, Community! Need information and examples.

What I have:

1) Custom board with Renesas R7S721020VC controller

2) J-LInk Debugger

3) E2 Studio as IDE

4) LED connected to PORT 6_PIN 0

5) Clock source: 48MHz USB crystal. 

What I want:

1) Run simple program on baremetal (flash LED?)

Thanx.

I wrote a small program, but I can’t understand why function calls do not work.Below is a listing of the program.When I load it into the processor, the LED lights up.But if I try to call led_init()+led_on() functions or functions from the standard library (example: sleep()), then nothing works. What am I doing wrong?

/*rza1l.c*/

#include <typedefine.h>
#include <iodefine.h>

#include <pfc.h>

#include <string.h>
#include <stdio.h>
#include <unistd.h>

#ifdef CPPAPP
//Initialize global constructors
extern void __main()
{
  static int initialized;
  if (! initialized)
    {
      typedef void (*pfunc) ();
      extern pfunc __ctors[];
      extern pfunc __ctors_end[];
      pfunc *p;

      initialized = 1;
      for (p = __ctors_end; p > __ctors; )
    (*--p) ();

    }
}
#endif


void led_init(void)
{
    PORT6.PMCn.BIT.PMCn0 = 0;
    PORT6.PFCAEn.BIT.PFCAEn0 = 1;
    PORT6.PFCEn.BIT.PFCEn0 = 0;
    PORT6.PFCn.BIT.PFCn0 = 0;
    PORT6.PMn.BIT.PMn0 = 0;
}

void led_on(void)
{
    PORT6.Pn.BIT.Pn0 = 1;
}

void led_off(void)
{
    PORT6.Pn.BIT.Pn0 = 0;
}

int main(void) {
        //led_init();
        //led_on();

        PORT6.PMCn.BIT.PMCn0 = 0;
        PORT6.PFCAEn.BIT.PFCAEn0 = 1;
        PORT6.PFCEn.BIT.PFCEn0 = 0;
        PORT6.PFCn.BIT.PFCn0 = 0;
        PORT6.PMn.BIT.PMn0 = 0;
        PORT6.Pn.BIT.Pn0 = 1;

    while(1)
    {

    }
    return 0;
}

/*pfc.h*/

#ifndef __PFC_H__
#define __PFC_H__

#include "typedefine.h"

struct st_pfc_n {                              /* struct PFC    */
       union {                                  /* Pn           */
             _UWORD WORD;                       /*  Word Access */
             struct {                           /*  Bit Access  */
                    _UWORD Pn0:1;               /*              */
                    _UWORD Pn1:1;               /*              */
                    _UWORD Pn2:1;               /*              */
                    _UWORD Pn3:1;               /*              */
                    _UWORD Pn4:1;               /*              */
                    _UWORD Pn5:1;               /*              */
                    _UWORD Pn6:1;               /*              */
                    _UWORD Pn7:1;               /*              */
                    _UWORD Pn8:1;               /*              */
                    _UWORD Pn9:1;               /*              */
                    _UWORD Pn10:1;              /*              */
                    _UWORD Pn11:1;              /*              */
                    _UWORD Pn12:1;              /*              */
                    _UWORD Pn13:1;              /*              */
                    _UWORD Pn14:1;              /*              */
                    _UWORD Pn15:1;              /*              */
                    } BIT;                      /*              */
             } Pn;                              /*              */
       _UBYTE wk0[0x100-2];                     /*              */
       union {                                  /* PSRn         */
             _UDWORD LONG;                      /*  Long Access */
             struct {                           /*  WORD Access */
                    _UDWORD ENABLE:16;          /*              */
                    _UDWORD SET:16;             /*              */
                    } SET;
             struct {                           /*  Bit Access  */
                    _UDWORD PSRn0:1;            /*              */
                    _UDWORD PSRn1:1;            /*              */
                    _UDWORD PSRn2:1;            /*              */
                    _UDWORD PSRn3:1;            /*              */
                    _UDWORD PSRn4:1;            /*              */
                    _UDWORD PSRn5:1;            /*              */
                    _UDWORD PSRn6:1;            /*              */
                    _UDWORD PSRn7:1;            /*              */
                    _UDWORD PSRn8:1;            /*              */
                    _UDWORD PSRn9:1;            /*              */
                    _UDWORD PSRn10:1;           /*              */
                    _UDWORD PSRn11:1;           /*              */
                    _UDWORD PSRn12:1;           /*              */
                    _UDWORD PSRn13:1;           /*              */
                    _UDWORD PSRn14:1;           /*              */
                    _UDWORD PSRn15:1;           /*              */
                    _UDWORD PSRn16:1;           /*              */
                    _UDWORD PSRn17:1;           /*              */
                    _UDWORD PSRn18:1;           /*              */
                    _UDWORD PSRn19:1;           /*              */
                    _UDWORD PSRn20:1;           /*              */
                    _UDWORD PSRn21:1;           /*              */
                    _UDWORD PSRn22:1;           /*              */
                    _UDWORD PSRn23:1;           /*              */
                    _UDWORD PSRn24:1;           /*              */
                    _UDWORD PSRn25:1;           /*              */
                    _UDWORD PSRn26:1;           /*              */
                    _UDWORD PSRn27:1;           /*              */
                    _UDWORD PSRn28:1;           /*              */
                    _UDWORD PSRn29:1;           /*              */
                    _UDWORD PSRn30:1;           /*              */
                    _UDWORD PSRn31:1;           /*              */
                    } BIT;                      /*              */
             } PSRn;                            /*              */
       _UBYTE wk1[0x100-4];                     /*              */
       union {                                  /* PPRn         */
             _UWORD WORD;                       /*  Word Access */
             struct {                           /*  Bit Access  */
                    _UWORD PPRn0:1;             /*              */
                    _UWORD PPRn1:1;             /*              */
                    _UWORD PPRn2:1;             /*              */
                    _UWORD PPRn3:1;             /*              */
                    _UWORD PPRn4:1;             /*              */
                    _UWORD PPRn5:1;             /*              */
                    _UWORD PPRn6:1;             /*              */
                    _UWORD PPRn7:1;             /*              */
                    _UWORD PPRn8:1;             /*              */
                    _UWORD PPRn9:1;             /*              */
                    _UWORD PPRn10:1;            /*              */
                    _UWORD PPRn11:1;            /*              */
                    _UWORD PPRn12:1;            /*              */
                    _UWORD PPRn13:1;            /*              */
                    _UWORD PPRn14:1;            /*              */
                    _UWORD PPRn15:1;            /*              */
                    } BIT;                      /*              */
             } PPRn;                            /*              */
       _UBYTE wk2[0x100-2];                     /*              */
       union {                                  /* PMn          */
             _UWORD WORD;                       /*  Word Access */
             struct {                           /*  Bit Access  */
                    _UWORD PMn0:1;              /*              */
                    _UWORD PMn1:1;              /*              */
                    _UWORD PMn2:1;              /*              */
                    _UWORD PMn3:1;              /*              */
                    _UWORD PMn4:1;              /*              */
                    _UWORD PMn5:1;              /*              */
                    _UWORD PMn6:1;              /*              */
                    _UWORD PMn7:1;              /*              */
                    _UWORD PMn8:1;              /*              */
                    _UWORD PMn9:1;              /*              */
                    _UWORD PMn10:1;             /*              */
                    _UWORD PMn11:1;             /*              */
                    _UWORD PMn12:1;             /*              */
                    _UWORD PMn13:1;             /*              */
                    _UWORD PMn14:1;             /*              */
                    _UWORD PMn15:1;             /*              */
                    } BIT;                      /*              */
             } PMn;                             /*              */
       _UBYTE wk3[0x100-2];                     /*              */
       union {                                  /* PMCn         */
             _UWORD WORD;                       /*  Word Access */
             struct {                           /*  Bit Access  */
                    _UWORD PMCn0:1;             /*              */
                    _UWORD PMCn1:1;             /*              */
                    _UWORD PMCn2:1;             /*              */
                    _UWORD PMCn3:1;             /*              */
                    _UWORD PMCn4:1;             /*              */
                    _UWORD PMCn5:1;             /*              */
                    _UWORD PMCn6:1;             /*              */
                    _UWORD PMCn7:1;             /*              */
                    _UWORD PMCn8:1;             /*              */
                    _UWORD PMCn9:1;             /*              */
                    _UWORD PMCn10:1;            /*              */
                    _UWORD PMCn11:1;            /*              */
                    _UWORD PMCn12:1;            /*              */
                    _UWORD PMCn13:1;            /*              */
                    _UWORD PMCn14:1;            /*              */
                    _UWORD PMCn15:1;            /*              */
                     } BIT;                      /*              */
             } PMCn;                            /*              */
       _UBYTE wk4[0x100-2];                     /*              */
       union {                                  /* PFCn         */
             _UWORD WORD;                       /*  Word Access */
             struct {                           /*  Bit Access  */
                    _UWORD PFCn0:1;             /*              */
                    _UWORD PFCn1:1;             /*              */
                    _UWORD PFCn2:1;             /*              */
                    _UWORD PFCn3:1;             /*              */
                    _UWORD PFCn4:1;             /*              */
                    _UWORD PFCn5:1;             /*              */
                    _UWORD PFCn6:1;             /*              */
                    _UWORD PFCn7:1;             /*              */
                    _UWORD PFCn8:1;             /*              */
                    _UWORD PFCn9:1;             /*              */
                    _UWORD PFCn10:1;            /*              */
                    _UWORD PFCn11:1;            /*              */
                    _UWORD PFCn12:1;            /*              */
                    _UWORD PFCn13:1;            /*              */
                    _UWORD PFCn14:1;            /*              */
                    _UWORD PFCn15:1;            /*              */
                    } BIT;                      /*              */
             } PFCn;                            /*              */
       _UBYTE wk5[0x100-2];                     /*              */
       union {                                  /* PFCEn        */
             _UWORD WORD;                       /*  Word Access */
             struct {                           /*  Bit Access  */
                    _UWORD PFCEn0:1;            /*              */
                    _UWORD PFCEn1:1;            /*              */
                    _UWORD PFCEn2:1;            /*              */
                    _UWORD PFCEn3:1;            /*              */
                    _UWORD PFCEn4:1;            /*              */
                    _UWORD PFCEn5:1;            /*              */
                    _UWORD PFCEn6:1;            /*              */
                    _UWORD PFCEn7:1;            /*              */
                    _UWORD PFCEn8:1;            /*              */
                    _UWORD PFCEn9:1;            /*              */
                    _UWORD PFCEn10:1;           /*              */
                    _UWORD PFCEn11:1;           /*              */
                    _UWORD PFCEn12:1;           /*              */
                    _UWORD PFCEn13:1;           /*              */
                    _UWORD PFCEn14:1;           /*              */
                    _UWORD PFCEn15:1;           /*              */
                    } BIT;                      /*              */
             } PFCEn;                           /*              */
       _UBYTE wk6[0x100-2];                     /*              */
       union {                                  /* PNOTn        */
             _UWORD WORD;                       /*  Word Access */
             struct {                           /*  Bit Access  */
                    _UWORD PNOTn0:1;            /*              */
                    _UWORD PNOTn1:1;            /*              */
                    _UWORD PNOTn2:1;            /*              */
                    _UWORD PNOTn3:1;            /*              */
                    _UWORD PNOTn4:1;            /*              */
                    _UWORD PNOTn5:1;            /*              */
                    _UWORD PNOTn6:1;            /*              */
                    _UWORD PNOTn7:1;            /*              */
                    _UWORD PNOTn8:1;            /*              */
                    _UWORD PNOTn9:1;            /*              */
                    _UWORD PNOTn10:1;           /*              */
                    _UWORD PNOTn11:1;           /*              */
                    _UWORD PNOTn12:1;           /*              */
                    _UWORD PNOTn13:1;           /*              */
                    _UWORD PNOTn14:1;           /*              */
                    _UWORD PNOTn15:1;           /*              */
                    } BIT;                      /*              */
             } PNOTn;                           /*              */
       _UBYTE wk7[0x100-2];                     /*              */
       union {                                  /* PMSRn        */
             _UDWORD LONG;                      /*  Long Access */
             struct {                           /*  WORD Access */
                    _UDWORD ENABLE:16;          /*              */
                    _UDWORD SET:16;             /*              */
                    } SET;
             struct {                           /*  Bit Access  */
                    _UDWORD PMSRn0:1;           /*              */
                    _UDWORD PMSRn1:1;           /*              */
                    _UDWORD PMSRn2:1;           /*              */
                    _UDWORD PMSRn3:1;           /*              */
                    _UDWORD PMSRn4:1;           /*              */
                    _UDWORD PMSRn5:1;           /*              */
                    _UDWORD PMSRn6:1;           /*              */
                    _UDWORD PMSRn7:1;           /*              */
                    _UDWORD PMSRn8:1;           /*              */
                    _UDWORD PMSRn9:1;           /*              */
                    _UDWORD PMSRn10:1;          /*              */
                    _UDWORD PMSRn11:1;          /*              */
                    _UDWORD PMSRn12:1;          /*              */
                    _UDWORD PMSRn13:1;          /*              */
                    _UDWORD PMSRn14:1;          /*              */
                    _UDWORD PMSRn15:1;          /*              */
                    _UDWORD PMSRn16:1;          /*              */
                    _UDWORD PMSRn17:1;          /*              */
                    _UDWORD PMSRn18:1;          /*              */
                    _UDWORD PMSRn19:1;          /*              */
                    _UDWORD PMSRn20:1;          /*              */
                    _UDWORD PMSRn21:1;          /*              */
                    _UDWORD PMSRn22:1;          /*              */
                    _UDWORD PMSRn23:1;          /*              */
                    _UDWORD PMSRn24:1;          /*              */
                    _UDWORD PMSRn25:1;          /*              */
                    _UDWORD PMSRn26:1;          /*              */
                    _UDWORD PMSRn27:1;          /*              */
                    _UDWORD PMSRn28:1;          /*              */
                    _UDWORD PMSRn29:1;          /*              */
                    _UDWORD PMSRn30:1;          /*              */
                    _UDWORD PMSRn31:1;          /*              */
                    } BIT;                      /*              */
             } PMSRn;                           /*              */
       _UBYTE wk8[0x100-4];                     /*              */
       union {                                  /* PMCSRn       */
             _UDWORD LONG;                      /*  Long Access */
             struct {                           /*  WORD Access */
                    _UDWORD ENABLE:16;          /*              */
                    _UDWORD SET:16;             /*              */
                    } SET;
             struct {                           /*  Bit Access  */
                    _UDWORD PMCSRn0:1;          /*              */
                    _UDWORD PMCSRn1:1;          /*              */
                    _UDWORD PMCSRn2:1;          /*              */
                    _UDWORD PMCSRn3:1;          /*              */
                    _UDWORD PMCSRn4:1;          /*              */
                    _UDWORD PMCSRn5:1;          /*              */
                    _UDWORD PMCSRn6:1;          /*              */
                    _UDWORD PMCSRn7:1;          /*              */
                    _UDWORD PMCSRn8:1;          /*              */
                    _UDWORD PMCSRn9:1;          /*              */
                    _UDWORD PMCSRn10:1;         /*              */
                    _UDWORD PMCSRn11:1;         /*              */
                    _UDWORD PMCSRn12:1;         /*              */
                    _UDWORD PMCSRn13:1;         /*              */
                    _UDWORD PMCSRn14:1;         /*              */
                    _UDWORD PMCSRn15:1;         /*              */
                    _UDWORD PMCSRn16:1;         /*              */
                    _UDWORD PMCSRn17:1;         /*              */
                    _UDWORD PMCSRn18:1;         /*              */
                    _UDWORD PMCSRn19:1;         /*              */
                    _UDWORD PMCSRn20:1;         /*              */
                    _UDWORD PMCSRn21:1;         /*              */
                    _UDWORD PMCSRn22:1;         /*              */
                    _UDWORD PMCSRn23:1;         /*              */
                    _UDWORD PMCSRn24:1;         /*              */
                    _UDWORD PMCSRn25:1;         /*              */
                    _UDWORD PMCSRn26:1;         /*              */
                    _UDWORD PMCSRn27:1;         /*              */
                    _UDWORD PMCSRn28:1;         /*              */
                    _UDWORD PMCSRn29:1;         /*              */
                    _UDWORD PMCSRn30:1;         /*              */
                    _UDWORD PMCSRn31:1;         /*              */
                    } BIT;                      /*              */
             } PMCSRn;                          /*              */
       _UBYTE wk9[0x100-4];                     /*              */
       union {                                  /* PFACEn       */
             _UWORD WORD;                       /*  Word Access */
             struct {                           /*  Bit Access  */
                    _UWORD PFCAEn0:1;           /*              */
                    _UWORD PFCAEn1:1;           /*              */
                    _UWORD PFCAEn2:1;           /*              */
                    _UWORD PFCAEn3:1;           /*              */
                    _UWORD PFCAEn4:1;           /*              */
                    _UWORD PFCAEn5:1;           /*              */
                    _UWORD PFCAEn6:1;           /*              */
                    _UWORD PFCAEn7:1;           /*              */
                    _UWORD PFCAEn8:1;           /*              */
                    _UWORD PFCAEn9:1;           /*              */
                    _UWORD PFCAEn10:1;          /*              */
                    _UWORD PFCAEn11:1;          /*              */
                    _UWORD PFCAEn12:1;          /*              */
                    _UWORD PFCAEn13:1;          /*              */
                    _UWORD PFCAEn14:1;          /*              */
                    _UWORD PFCAEn15:1;          /*              */
                    } BIT;                      /*              */
             } PFCAEn;                          /*              */
       _UBYTE wk10[0x4000-0xa00-2];             /*              */
       union {                                  /* PIBCn        */
             _UWORD WORD;                       /*  Word Access */
             struct {                           /*  Bit Access  */
                    _UWORD PIBCn0:1;            /*              */
                    _UWORD PIBCn1:1;            /*              */
                    _UWORD PIBCn2:1;            /*              */
                    _UWORD PIBCn3:1;            /*              */
                    _UWORD PIBCn4:1;            /*              */
                    _UWORD PIBCn5:1;            /*              */
                    _UWORD PIBCn6:1;            /*              */
                    _UWORD PIBCn7:1;            /*              */
                    _UWORD PIBCn8:1;            /*              */
                    _UWORD PIBCn9:1;            /*              */
                    _UWORD PIBCn10:1;           /*              */
                    _UWORD PIBCn11:1;           /*              */
                    _UWORD PIBCn12:1;           /*              */
                    _UWORD PIBCn13:1;           /*              */
                    _UWORD PIBCn14:1;           /*              */
                    _UWORD PIBCn15:1;           /*              */
                    } BIT;                      /*              */
             } PIBCn;                           /*              */
       _UBYTE wk11[0x100-2];                    /*              */
       union {                                  /* PBDCn        */
             _UWORD WORD;                       /*  Word Access */
             struct {                           /*  Bit Access  */
                    _UWORD PBDCn0:1;            /*              */
                    _UWORD PBDCn1:1;            /*              */
                    _UWORD PBDCn2:1;            /*              */
                    _UWORD PBDCn3:1;            /*              */
                    _UWORD PBDCn4:1;            /*              */
                    _UWORD PBDCn5:1;            /*              */
                    _UWORD PBDCn6:1;            /*              */
                    _UWORD PBDCn7:1;            /*              */
                    _UWORD PBDCn8:1;            /*              */
                    _UWORD PBDCn9:1;            /*              */
                    _UWORD PBDCn10:1;           /*              */
                    _UWORD PBDCn11:1;           /*              */
                    _UWORD PBDCn12:1;           /*              */
                    _UWORD PBDCn13:1;           /*              */
                    _UWORD PBDCn14:1;           /*              */
                    _UWORD PBDCn15:1;           /*              */
                    } BIT;                      /*              */
             } PBDCn;                           /*              */
       _UBYTE wk12[0x100-2];                    /*              */
       union {                                  /* PIPCn        */
             _UWORD WORD;                       /*  Word Access */
             struct {                           /*  Bit Access  */
                    _UWORD PIPCn0:1;            /*              */
                    _UWORD PIPCn1:1;            /*              */
                    _UWORD PIPCn2:1;            /*              */
                    _UWORD PIPCn3:1;            /*              */
                    _UWORD PIPCn4:1;            /*              */
                    _UWORD PIPCn5:1;            /*              */
                    _UWORD PIPCn6:1;            /*              */
                    _UWORD PIPCn7:1;            /*              */
                    _UWORD PIPCn8:1;            /*              */
                    _UWORD PIPCn9:1;            /*              */
                    _UWORD PIPCn10:1;           /*              */
                    _UWORD PIPCn11:1;           /*              */
                    _UWORD PIPCn12:1;           /*              */
                    _UWORD PIPCn13:1;           /*              */
                    _UWORD PIPCn14:1;           /*              */
                    _UWORD PIPCn15:1;           /*              */
                    } BIT;                      /*              */
             } PIPCn;                           /*              */
       _UBYTE wk13[0x100-2];                    /*              */
};                                              /*              */


#define PORTn_BASE    0xFCFE3000


#define    PORT0        (*(volatile struct st_pfc_n *)(PORTn_BASE + (4 *  0)))    /* PORT  0 Address */
#define    PORT1        (*(volatile struct st_pfc_n *)(PORTn_BASE + (4 *  1)))    /* PORT  1 Address */
#define    PORT2        (*(volatile struct st_pfc_n *)(PORTn_BASE + (4 *  2)))    /* PORT  2 Address */
#define    PORT3        (*(volatile struct st_pfc_n *)(PORTn_BASE + (4 *  3)))    /* PORT  3 Address */
#define    PORT4        (*(volatile struct st_pfc_n *)(PORTn_BASE + (4 *  4)))    /* PORT  4 Address */
#define    PORT5        (*(volatile struct st_pfc_n *)(PORTn_BASE + (4 *  5)))    /* PORT  5 Address */
#define    PORT6        (*(volatile struct st_pfc_n *)(PORTn_BASE + (4 *  6)))    /* PORT  6 Address */
#define    PORT7        (*(volatile struct st_pfc_n *)(PORTn_BASE + (4 *  7)))    /* PORT  7 Address */
#define    PORT8        (*(volatile struct st_pfc_n *)(PORTn_BASE + (4 *  8)))    /* PORT  8 Address */
#define    PORT9        (*(volatile struct st_pfc_n *)(PORTn_BASE + (4 *  9)))    /* PORT  9 Address */
#define    PORT10        (*(volatile struct st_pfc_n *)(PORTn_BASE + (4 * 10)))   /* PORT 10 Address */
#define    PORT11        (*(volatile struct st_pfc_n *)(PORTn_BASE + (4 * 11)))   /* PORT 11 Address */

#endif /* __PFC_H__ */

/*start.S*/

    .list
    .section .text
    .global _PowerON_Reset    /*global Start routine */
    
    .extern HardwareSetup  /*external Sub-routine to initialise Hardware*/
    .extern _data
    .extern _mdata
    .extern __bss_start__
    .extern __bss_end__
    .extern _edata
    .extern main
    .extern .Lstack
    .extern _rvectors
    .extern _exit


/* bss initialisation labels  */
     .LC1:
     .word    __bss_start__
     .LC2:
     .word    __bss_end__

/* data initialisation labels  */
     .LD1:
     .word    _mdata
     .LD2:
     .word    _data
     .LD3:
     .word    _edata

     _PowerON_Reset:
     movs     a2, #0           /* Second arg: fill value */
     mov    fp, a2             /* Null frame pointer */
     mov    r7, a2             /* Null frame pointer for Thumb */
     ldr    a1, .LC1           /* First arg: start of memory block */
     ldr    a3, .LC2
     cmp    a3, a1
     beq     .next1
     .next:
     strb     a2, [a1]
     add    a1, a1, #1
     cmp    a3, a1
     bne    .next

vfp_init:
#ifndef __SOFTFP__
    /* Initialize VFP setting */
     ldr    r0,=(0xF <<20)
     mcr    p15, 0, r0, c1, c0, 2
     mov    r3,#0x40000000
     vmsr    fpexc, r3
#endif

/* load data section from ROM to RAM */

    .next1:
#ifndef SIMULATOR_DEBUG
    ldr    a3, .LD1
    ldr    a1,    .LD2
    ldr    a2, .LD3
    cmp    a2, a1
    beq    .next2
    .start:
    ldrb    a4, [a3]
    strb    a4,    [a1]
    add    a3, a3, #1
    add    a1, a1, #1
    cmp    a1,    a2
    bne    .start
    .next2:
#endif

/* initialise stack pointer */
     .Lstack:
     .word    _stack
     ldr    r11, .Lstack
     cmp    r11, #0
     beq    exit
     mov    sp, r11

#ifndef SIMULATOR_DEBUG
/* call the hardware initialiser */
    bl    HardwareSetup
#endif

/* start user program */
    bl    main
    bl    exit

/* call to exit*/
    exit:
    bl  _loop_here
    _loop_here:
    bl _loop_here

    .text
    .end